final spring2022 answers

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Computer Science

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May 13, 2024

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1 Computer Systems Organization CSCI-UA.0201-001 Spring 2022 Final Exam ANSWERS Write your answers on this exam paper. You can use the back of the sheets for scratch. 1. (10 points) True/False. Please circle the correct response. a. T A write-through cache doesn’t need a dirty bit associated with each cache entry. b. F The output of a clocked latch (aka “D-latch”) changes only when the clock goes from high voltage to low voltage. c. F The instruction “leaq 16(%rcx),%rdx” on the x64 processor could cause a cache miss if the contents of the memory location at address %rcx+16 is not in the cache. d. T Assuming a two’s complement representation of signed integers, shifting a signed integer variable left by one bit in C could change the sign of the value of the variable. e. F Assuming a two’s complement representation of signed integers, shifting a signed integer variable right by one bit in C could change the sign of the value of the variable. f. T The instruction “addq -8(%rbp),%rax” will cause the write_enable line for the register file to be 1. g. F A callee-saved register must be saved in a function even if the function is only reading the register (not writing it). h. T Local variables in a function that are allocated on the stack will be at negative offsets from %rbp on the x64 processor. i. F Formal parameters to a function that are passed on the stack (after the ones passed in registers) will be at negative offsets from %rbp on the x64 processor. j. F In C, the operation “x & 0x8” will evaluate to 0 if bit 3 (the fourth lowest bit) of x is 0 and will evaluate to 1 if bit 3 of x is 1. 2. (10 points: a is 4 points, the rest 2 points each) Fill in the blanks on this sheet. a. Write the number E32A hex in binary: 1110 0011 0010 1010. b. log 16T = 44 . c. In order to access all bytes in a 64GB memory, an address must have at least 36 bits. d. If a signed integer variable (using two’s complement) is represented by 42 bits, how many different negative numbers could that variable take on? Answer in multiples of K, M, G, or T. 2 42 /2 = 2 41 = 2T.

2 3. (10 points) Write a C function whose prototype is int intlog(unsigned int num); and which returns the largest integer less than or equal to the log (base 2) of num . For example, intlog(72) should return 6, since 6 ≤ log 72 < 7. Answer: int intlog(unsigned int num) { int log = -1; // not really valid, assuming num > 0 while (num != 0) { num >>= 1; log++; } return log; } 4. (15 points: a is 5 points, b is 10 points) Given the following definition of a QUEUE struct type used for a queue, typedef struct { long head; long tail; char *buff[1000]; } QUEUE; where buff is an array of strings, head is the index of the first string in buff , and tail is the index of the last string in buff , a. Write a C function whose prototype is void insert_string(char *str, QUEUE *q); that takes a string (char pointer) and a pointer to a queue and inserts the string into the queue’s buff array after the last string already in the queue. Be sure to update the fields of the queue as necessary. You do not need to check if there is space available in buff , you can just assume there is. This is a very short function. Answer: void insert_string(char *str, QUEUE *q) { q->tail++; q->buff[q->tail] = str; }

3 b. Translate your C function into x86-64 assembly code for either Unix (e.g. MacOS or Linux) or Cygwin/Windows. An assembly reference sheet and the calling conventions for Unix and Windows are provided at the end of this exam. You can assume that the fields of a QUEUE struct are contiguous (no space between them). Answer: _insert_string: pushq %rbp movq %rsp, %rbp # str is in %rdi # q is in %rsi # tail is at offset 8 # buff is at offset 16 incq 8(%rsi) # q->tail++; movq 8(%rsi),%rcx # %rcx holds q->tail movq %rdi,16(%rsi,%rcx,8) # q->buff[q->tail] = str; # each element is 8 bytes. popq %rbp retq 5. (15 points: 5 points each question) a. These questions relate to direct-mapped caches: i. In a direct mapped cache whose capacity is K bytes (where K is a power of two), with one word per cache line, what is the relationship between the addresses of two words in memory that map to the same entry in the cache? Answer: The addresses are a multiple of K apart. That’s because the cache index is computed as address mod size_of_cache. ii. Suppose an address is 32 bits and there is a 1MB direct-mapped cache (where a word is 4 bytes). Not knowing anything else about the cache (e.g. size of the cache line), can you determine how many bits of an address is needed for the tag? If not, explain why not. If so, give the number of tag bits. Answer: As indicated in the lecture, the tag is 30-log N bits, where N is the number of words in the cache, so in this case, the tag is 30-log(2 20 /4) = 30 – log(2 18 ) = 30 – 18 = 12. Another way to look at it is that with a 1MB cache, to select a particular byte from the cache requires log(1M) = log(2 20 ) = 20 bits, no matter how those bits are divided up into byte offset and word offset. The remaining 12 bits in the address must be the tag bits.

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